Re: delay chips and design

["Dennis Leas" <dennis@mail.worldserver.com>]

> next question: does the EDP "read samples" like the repeater and if so 
>why
> does it not have a "pop" at the loop point of a looped sine.  does the
line
> 6 "read samples" and is it's behavior more akin to the repeater or the
EDP?
> how prevalent is the repeater design architecture becoming in the
> delay -loop market?

I'm not sure about the Panasonic chips being compatible, but I'll comment 
on
the "pop" question.

I wouldn't read too much into the phrase "read samples."  In any
time-quatized system (i.e., any system where you divide time into discrete
chunks) you have "samples" regardless of whether the sample is represented
as a voltage level (analog "bucket brigade") or a digital number.

Typically the "pop" occurs at the loop splice point because the last sample
point is radically different than the first sample point.  A characteristic
of sampled audio systems is that the smaller the defect (in time) the more
audible it is.  Hence a quick discontinuity of only one sample point 
creates
a loud "pop."

Usually, designers use two techniques to eliminate the discontinuity.  1)
Cross-fade the end of the waveform over the beginning.  2) Adjust the loop
splice point so that it occurs at a zero-crossing point.  Both techinques
have their uses and problems.

If the input waveform consists of a pure sine wave, after cross-fading the
stored waveform will not be a sine wave.    I.e., with cross-fading the
integrity of the signal suffers.

On the other hand, adjusting the loop splice point necessarily changes the
length of the sampled waveform.  Therefore the zero-crossing adjusted loop
will not be the precise length of the original loop.

I suspect the Repeater's designers (who are really bright folks) just 
needed
to tweak things a bit to eliminate the "pop."  Unfortunately, time ran out.


Dennis Leas
-------------------
dennis@mail.worldserver.com